1. Field of the Invention
The present invention relates generally to semiconductor wafer fabrication and more particularly to a three electrode etch chamber for selective and anisotropic etching of polycrystalline silicon and metal conductors in semiconductor wafer fabrication.
2. Description of the Prior Art
Polycrystalline silicon is used widely as a gate material in semiconductor wafer fabrication. The modern trend with respect to such technology, is to go to greater and greater device densities which in turn necessitates smaller minimum feature dimensions which must be precisely maintained during semiconductor wafer processing. This is achieved using anisotropic and selective etching techniques which utilize high density plasmas provided at relatively low pressures.
As is well known in the art, plasma etching employs a plasma coupled to an RF voltage to create a chemically active etchant that forms a volatile etching product with the unprotected layers of a substrate. This technique is made possible by the existence of suitable combinations of substrate and etching gas. Such combinations are available for the majority of the films used to fabricate semiconductor devices. Examples of typical etching gases include chlorine and fluorine compounds which are respectively available in the form of CCl.sub.4 and CF.sub.4. These compounds have been adapted for etching polysilicon, SiO.sub.2 Si.sub.3 N.sub.4, and metals. For example, fluorine radicals will react with silicon to produce a volatile silicon tetrafluoride etching product. Oxygen containing plasmas are commonly employed to etch organic films including resist or to substantially increase the etching rate of the etch gas.
Plasma etching is generally performed in an etch chamber as shown in FIG. 1. The prior art etch chamber 10 of FIG. 1 comprises a sidewall 12 and a dielectric window 14 made from an ultra pure quartz plate. An induction coil 16 is located above the dielectric window 14 of the chamber 10 and is powered by an RF generator 18. Located within the chamber 10 is an electrically conductive wafer holding mechanism 22 commonly known as a chuck. A second RF generator 20 powers the wafer chuck. A dense inductively coupled plasma is generated by powering the coil 16 with the generator 18. The second generator 20 is used to generate an RF bias on the wafer 24 and this causes ion bombardment to the wafer surface which is necessary for anisotropic reactive ion etching (R.I.E.).
Etching in the chamber described above, however, does not always provide the desired anisotropy.
For example, the fabrication of a polysilicon gate by plasma etching in the chamber of FIG. 1 often produces a gate with sloping or undercut sidewalls. This is caused by selectivity problems. In particular, selectivity is required to pattern polysilicon gate electrodes without removing the thin underlying gate oxide, since the etching ratios needed increases in both instances as the devices become smaller. More specifically, a higher degree of selectivity for silicon dioxide relative to, silicon is needed because the junction depth decreases faster than the thickness of the field oxide. Further, a higher degree of selectivity for silicon relative to silicon dioxide is a must because the thickness of the gate oxide decreases at a faster rate than the thickness of the gate electrode. Additionally, the required selectivity depends on the thicknesses of the etched and underlying films as well as on the topography produced by earlier processing steps.
Hence, in order to obtain anisotropy during plasma etching in the chamber of FIG. 1, junction sidewall passivation is needed. This is achieved in the prior art chamber of FIG. 1 by properly selecting the earlier described etch products. However, even with the proper selection, the concentration of these etch products depletes near the end of the etch process, thus, slowing down the build-up of the sidewall passivation. In many cases, this causes notching and a reduced selectivity to the underlying layer such as the gate oxide. Thus, there is a need to control the formation of sidewall passivation using something other than careful selection of the etch products.
It is, therefore, a primary object of the present invention to provide an improved etch chamber which enables the formation of the sidewall passivation to be more accurately controlled.